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Infineon IFX20001MBV33HTSA1

The IFX20001 is a monolithic integrated low-drop voltage regulator in the very small SMD package PG-SCT595-5. It is designed to supply various loads (e.g. microprocessor) under over severe conditions. Therefore the device is equipped with additional protection functions against overload, short circuit and reverse polarity. In case of an over temperature condition the regulator is automatically turned off by the integrated thermal protection circuit. Input voltages up to 45 V are regulated to V Q,nom = 3.3 V (V33 version) or 5.0 V (V50 version). The output is able to drive a load of 30 mA while it regulates the output voltage within a 4% accuracy. To save energy the device can be switched in stand-by mode via an inhibit input which causes the current consumption to drop below 5 µA.

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Symbol Views

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Normal: Standard and most popular representation of schematic symbol

ALT_1 (IEEE view): Symbol representation in a way that is more graphical in explaining what the purpose of each pin is. For connectors and most discretes (as we use these views) it is simply an alternate view for people to use depending on the situation. For instance connectors can be generally an input, an output or neither. Resistors can be vertical or horizontal.

ALT_2 (demorgan): Demorgan is a name for an equivalent Gate structure. so for instance an AND gate and an OR gate can be represented by its Demorgan equivalent of a NOR gate.

Sometimes a device is fractured into multiple symbols (often for high pin count parts). If that is the case, you can preview the different symbols that make up the device by selecting them in this drop down.

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Basic: Our standard footprint view showing, contact area, pin number, top, top assembly

Detailed: Additional info to help you evaluate the part and the footprint including: dimension, silkscreen, soldermask, and solderpaste

PinDetail: Highlights the pin to pad contact area dimensions

Displays min/typ/max pad sizes for footprint per IPC specification (not all sizes will be available for every part)

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