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Texas Instruments TPL5111DDCR

Status: Active
Datasheet
Ultra low power system timer (35 nA) for power gating in duty cycled applications 6-SOT-23-THIN -40 to 105
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ALT_1 (IEEE view): Symbol representation in a way that is more graphical in explaining what the purpose of each pin is. For connectors and most discretes (as we use these views) it is simply an alternate view for people to use depending on the situation. For instance connectors can be generally an input, an output or neither. Resistors can be vertical or horizontal.

ALT_2 (demorgan): Demorgan is a name for an equivalent Gate structure. so for instance an AND gate and an OR gate can be represented by its Demorgan equivalent of a NOR gate.

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