Lattice LCMXO2-4000HE-6MG132I

MACHX02 Series 4320 LUTs 105 I/O 1.2 V -6 Speed IND "Green" FPGA - BGA-132


Lattice LCMXO2-4000HE-6MG132I_A - Schematic Symbol Schematic Symbol of Lattice LCMXO2-4000HE-6MG132I_A showing how CAD model looks and operates before user downloads A1 VCC A2 PT9A A3 PT11A A4 PT13C A5 GND A6 PT15D A7 PT18A A8 VCCIO0 A9 PT21B B1 PL3A C1 PL4A C3 PL4B C4 PT11B C5 VCCIO0 C6 PT14B C7 NC C8 PT20C C9 PT21A D1 PL6B D3 VCCIO5 D4 D4 D5 D5 D6 D6 D7 D7 D8 D8 D9 D9 E1 PL7A E3 PL8A E4 E4 F1 PL9A F3 PL9B F4 F4 F6 F6 F7 F7 F8 F8 F9 F9 G1 VCCIO4 G3 PL10C G4 G4 G6 G6 G7 G7 G8 G8 G9 G9 H1 PL13A H3 PL13B H4 H4 H6 H6 H7 H7 H8 H8 H9 H9 J1 PL14A J3 PL16A J4 J4 J6 J6 J7 J7 J8 J8 J9 J9 K1 PL17A K3 PL17B K4 K4 L1 VCCIO3 L3 PL19B L4 L4 L5 L5 L6 L6 L7 L7


Lattice CSBGA132_LAT - PCB Footprint / Land Pattern PCB Footprint / Land Pattern of Lattice CSBGA132_LAT showing how CAD model looks and operates before user downloads A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 B1 B14 C1 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C14 D1 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D14 E1 E3 E4 E11 E12 E14 F1 F3 F4 F6 F7 F8 F9 F11 F12 F14 G1 G3 G4 G6 G7 G8 G9 G11 G12 G14 H1 H3 H4 H6 H7 H8 H9 H11 H12 H14 J1 J3 J4 J6 J7 J8 J9 J11 J12 J14 K1 K3 K4 K11 K12 K14 L1 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L14 M1 M3 M4 M5 M6 M7 M8 M9 M10 M11 M12 M14 N1 N14 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 A P 1 14

3D Model

Symbol Views

(not all views will be available for every part)

Normal: Standard and most popular representation of schematic symbol

ALT_1 (IEEE view): Symbol representation in a way that is more graphical in explaining what the purpose of each pin is. For connectors and most discretes (as we use these views) it is simply an alternate view for people to use depending on the situation. For instance connectors can be generally an input, an output or neither. Resistors can be vertical or horizontal.

ALT_2 (demorgan): Demorgan is a name for an equivalent Gate structure. so for instance an AND gate and an OR gate can be represented by its Demorgan equivalent of a NOR gate.

Sometimes a device is fractured into multiple symbols (often for high pin count parts). If that is the case, you can preview the different symbols that make up the device by selecting them in this drop down.

Footprint Views

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Basic: Our standard footprint view showing, contact area, pin number, top, top assembly

Detailed: Additional info to help you evaluate the part and the footprint including: dimension, silkscreen, soldermask, and solderpaste

PinDetail: Highlights the pin to pad contact area dimensions

Displays min/typ/max pad sizes for footprint per IPC specification (not all sizes will be available for every part)

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